summaryrefslogtreecommitdiff
path: root/app/platform/stm32f0-gcc/platform.cpp
diff options
context:
space:
mode:
Diffstat (limited to 'app/platform/stm32f0-gcc/platform.cpp')
-rw-r--r--app/platform/stm32f0-gcc/platform.cpp140
1 files changed, 140 insertions, 0 deletions
diff --git a/app/platform/stm32f0-gcc/platform.cpp b/app/platform/stm32f0-gcc/platform.cpp
new file mode 100644
index 0000000..00bc391
--- /dev/null
+++ b/app/platform/stm32f0-gcc/platform.cpp
@@ -0,0 +1,140 @@
+#include "platform/platform.h"
+#include "retarget.h"
+#include "third_party/CMSIS/Device/Include/system_stm32f0xx.h"
+#include "third_party/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_usart.h"
+#include "third_party/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_rcc.h"
+#include "third_party/STM32F0xx_StdPeriph_Driver/inc/stm32f0xx_gpio.h"
+
+#if defined(__GNUC__)
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wold-style-cast"
+#endif
+
+static void USART1Init(void)
+{
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE);
+ RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
+ GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_1);
+ GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_1);
+ GPIO_InitTypeDef GPIO_InitStructure;
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_Level_3;
+ GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
+ GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN;
+ GPIO_Init(GPIOA, &GPIO_InitStructure);
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
+ GPIO_Init(GPIOA, &GPIO_InitStructure);
+ USART_InitTypeDef usart_init{};
+ usart_init.USART_BaudRate = 115200;
+ usart_init.USART_WordLength = USART_WordLength_8b;
+ usart_init.USART_StopBits = USART_StopBits_1;
+ usart_init.USART_Parity = USART_Parity_No;
+ usart_init.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
+ usart_init.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
+ USART_Init(USART1, &usart_init);
+ USART1->CR1 |= USART_CR1_RXNEIE;
+ USART1->CR3 |= USART_CR3_OVRDIS;
+ USART_Cmd(USART1, ENABLE);
+ // TODO get rid of SPL
+}
+
+static void USART4Init(void)
+{
+ RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART4, ENABLE);
+ RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
+ GPIO_PinAFConfig(GPIOA, GPIO_PinSource0, GPIO_AF_4);
+ GPIO_PinAFConfig(GPIOA, GPIO_PinSource1, GPIO_AF_4);
+ GPIO_InitTypeDef GPIO_InitStructure;
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_Level_3;
+ GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
+ GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN;
+ GPIO_Init(GPIOA, &GPIO_InitStructure);
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1;
+ GPIO_Init(GPIOA, &GPIO_InitStructure);
+ USART_InitTypeDef usart_init{};
+ usart_init.USART_BaudRate = 9600;
+ usart_init.USART_WordLength = USART_WordLength_8b;
+ usart_init.USART_StopBits = USART_StopBits_1;
+ usart_init.USART_Parity = USART_Parity_No;
+ usart_init.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
+ usart_init.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
+ USART_Init(USART4, &usart_init);
+ USART4->CR1 |= USART_CR1_RXNEIE;
+ USART4->CR3 |= USART_CR3_OVRDIS;
+ USART_Cmd(USART4, ENABLE);
+ // TODO get rid of SPL
+}
+
+static void WIFI_IO_GPIOInit(void)
+{
+ RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
+ RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE);
+ GPIO_InitTypeDef GPIO_InitStructure;
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_15;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_Level_3;
+ GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
+ GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN;
+ GPIO_Init(GPIOA, &GPIO_InitStructure);
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0;
+ GPIO_Init(GPIOB, &GPIO_InitStructure);
+ GPIO_SetBits(GPIOB, GPIO_Pin_0); // WIFI_EN
+ GPIO_ResetBits(GPIOA, GPIO_Pin_15); // WIFI_IO0
+}
+
+static void USART3Init(void)
+{
+ RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
+ RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE);
+ GPIO_PinAFConfig(GPIOB, GPIO_PinSource1, GPIO_AF_4);
+ GPIO_PinAFConfig(GPIOB, GPIO_PinSource10, GPIO_AF_4);
+ GPIO_PinAFConfig(GPIOB, GPIO_PinSource11, GPIO_AF_4);
+ GPIO_PinAFConfig(GPIOB, GPIO_PinSource13, GPIO_AF_4);
+ GPIO_InitTypeDef GPIO_InitStructure;
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_Level_3;
+ GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
+ GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN;
+ GPIO_Init(GPIOB, &GPIO_InitStructure);
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
+ GPIO_Init(GPIOB, &GPIO_InitStructure);
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11;
+ GPIO_Init(GPIOB, &GPIO_InitStructure);
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13;
+ GPIO_Init(GPIOB, &GPIO_InitStructure);
+ USART_InitTypeDef usart_init{};
+ usart_init.USART_BaudRate = 115200;
+ usart_init.USART_WordLength = USART_WordLength_8b;
+ usart_init.USART_StopBits = USART_StopBits_1;
+ usart_init.USART_Parity = USART_Parity_No;
+ usart_init.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
+ usart_init.USART_HardwareFlowControl = USART_HardwareFlowControl_RTS_CTS;
+ USART_Init(USART3, &usart_init);
+ USART3->CR1 |= USART_CR1_RXNEIE;
+ USART3->CR3 |= USART_CR3_OVRDIS;
+ USART_Cmd(USART3, ENABLE);
+ // TODO get rid of SPL
+}
+
+void PlatformInit(void)
+{
+ SystemInit();
+ WIFI_IO_GPIOInit();
+ USART1Init();
+ USART3Init();
+ USART4Init();
+}
+
+int PlatformGetWiFiFileDescriptor(void)
+{
+ return WIFI_FILENO;
+}
+
+int PlatformGetGPSFileDescriptor(void)
+{
+ return GPS_FILENO;
+}