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authorOxore <oxore@protonmail.com>2020-03-05 00:33:55 +0300
committerOxore <oxore@protonmail.com>2020-03-05 00:36:29 +0300
commit19e0e4cb5f26df537bf07b428700bea30460fd5b (patch)
tree8f55e2525d107d28899aa3b486c3c8485965aa04 /src/memory.rs
parent7d4dfd8af842796c4eb8a88df0cc5ab30f99232d (diff)
Use bus for all memory types, etc.
Rename Memory to Bus
Diffstat (limited to 'src/memory.rs')
-rw-r--r--src/memory.rs19
1 files changed, 0 insertions, 19 deletions
diff --git a/src/memory.rs b/src/memory.rs
deleted file mode 100644
index 3949f75..0000000
--- a/src/memory.rs
+++ /dev/null
@@ -1,19 +0,0 @@
-extern crate num_traits;
-
-pub trait Memory<Addr>
-where
- Addr: Copy + core::ops::Add<Output = Addr> + num_traits::identities::One,
-{
- fn get(&self, a: Addr) -> u8;
-
- fn set(&mut self, a: Addr, v: u8);
-
- fn get_word(&self, a: Addr) -> u16 {
- u16::from(self.get(a)) | (u16::from(self.get(a + Addr::one())) << 8)
- }
-
- fn set_word(&mut self, a: Addr, v: u16) {
- self.set(a, (v & 0xFF) as u8);
- self.set(a + Addr::one(), (v >> 8) as u8)
- }
-}